Accelerator IP Design Engineer (ASIC, RTL)

As an Accelerator IP Design Engineer (ASIC, RTL), you will contribute to the design and development of next-generation AI accelerator IP and SoC solutions for edge AI applications.

Working closely with architecture, compiler, and verification teams, you will be responsible for RTL design, microarchitecture optimization, ASIC implementation activities, and system integration, helping to deliver highly efficient AI hardware platforms.

■Key Responsibilities
-Design and develop RTL modules for AI accelerator IPs.
-Perform module-level verification and debugging activities.
-Support synthesis, static timing analysis (STA), and power estimation.
-Optimize microarchitecture for performance, area, and power efficiency.
-Collaborate with architecture and compiler teams on new feature development.
-Support SoC integration activities using internal and third-party IPs.
-Participate in IP-level and SoC-level verification using SystemVerilog and UVM.
-Contribute to engineering best practices, documentation, testing, and CI workflows.

Employee Benefits:
-Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
-Strong experience in RTL design and ASIC development.
-Experience with Verilog/SystemVerilog-based hardware design.
-Knowledge of synthesis, timing closure, and power optimization methodologies.
-Experience with digital design debugging and verification.
-Understanding of SoC architectures and IP integration.
-Strong problem-solving and analytical skills.
-Ability to collaborate effectively in a multidisciplinary engineering environment.

-Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related discipline.
-Strong experience in RTL design and ASIC development.
-Experience with Verilog/SystemVerilog-based hardware design.
-Knowledge of synthesis, timing closure, and power optimization methodologies.
-Experience with digital design debugging and verification.
-Understanding of SoC architectures and IP integration.
-Strong problem-solving and analytical skills.
-Ability to collaborate effectively in a multidisciplinary engineering environment.