【外資系半導体メーカー】NVM回路設計エンジニア｜三重

大手外資系半導体メーカーにて、先端半導体向けのNon-Volatile Memory（NVM／不揮発性メモリ）IP開発を担うNVM回路設計エンジニアを募集しています。

本ポジションでは、NVMマクロの仕様策定、構造検討、回路アーキテクチャ設計、トランジスタレベルの回路設計、レイアウト、設計検証まで幅広く携わります。

メモリセルアレイ、高電圧書き込み・消去用チャージポンプ、センスアンプ、Row／Column Decoder、デジタル制御ロジックなど、NVMを構成する主要回路の設計・評価を担当します。

NVM開発やメモリ回路設計の経験を活かし、プロセスエンジニア、テストチーム、外部IPベンダーと連携しながらNVM IP開発に携わるポジションです。

• 新規NVM（不揮発性メモリ）マクロの仕様策定、構造検討、回路アーキテクチャ設計、レイアウト実装
• NVMメモリセルアレイのトランジスタレベル回路設計
• 高電圧書き込み・消去用チャージポンプ、センスアンプ、Row／Column Decoder、デジタル制御ロジックの設計
• Synopsys HSPICEを使用したトランジスタレベルシミュレーションおよび回路性能評価
• Static Timing Analysis（STA）、DRC／LVSによる設計検証
• NVMメモリIPコアの信頼性モデリング
• プロセスエンジニア、テストチーム、外部IPベンダーとの技術連携
• プロジェクトスケジュールに沿った開発業務の遂行

Join a major semiconductor manufacturing company in Mie, Japan as an NVM Memory Design Engineer, developing advanced Non-Volatile Memory (NVM) IP for next-generation semiconductor applications.

This role offers hands-on involvement across memory circuit design, NVM macro development, transistor-level simulation, layout and design verification. You will work on critical memory components including memory cell arrays, high-voltage charge pumps, sense amplifiers, decoders and digital control logic.

For an experienced semiconductor engineer, this is an opportunity to deepen your expertise in NVM technology, semiconductor IP development and advanced circuit design while collaborating with process engineers, test teams and external IP partners in an internationally connected engineering environment.

• Participate in specification development, structural research, circuit architecture design and layout implementation for new Non-Volatile Memory (NVM) macros.
• Perform transistor-level circuit design for NVM memory cell arrays, high-voltage write/erase charge pumps, sense amplifiers, row and column decoders, and digital control logic.
• Conduct HSPICE simulations to evaluate and verify transistor-level circuit performance.
• Perform static timing analysis and DRC/LVS verification to ensure memory IP designs meet required specifications and design rules.
• Conduct reliability modelling and verification for NVM memory IP cores.
• Collaborate with process engineering, testing teams and external IP vendors to support successful memory IP development and implementation.
• Maintain ownership of engineering deliverables and complete development activities in line with project schedules and technical requirements.

必須条件 経験・資格：

• 高等専門学校（高専）卒以上
• NVM（Non-Volatile Memory／不揮発性メモリ）の開発・メモリ回路設計の実務経験
• トランジスタレベルの回路設計・シミュレーションの実務経験
• Cadence Virtuoso、Synopsys HSPICEなどの回路設計・シミュレーションツールの使用経験

• プロジェクトスケジュールに沿って業務を確実に遂行できる主体性とオーナーシップ
• プロセスエンジニア、テストチーム、外部IPベンダーと円滑に連携できるコミュニケーション能力
• 先端半導体技術や新しいメモリアーキテクチャを積極的に学ぶ姿勢

• 日本語：流暢
• 英語：上級ビジネスレベル（英語の技術資料の読解、レポート作成、グローバルエンジニアリング会議あり）

• アナログ回路設計の経験
• デジタルロジック回路設計の経験
• 工学・理学系の学士号または修士号

大手外資系半導体メーカー。

先端ファウンドリ技術およびロジック半導体の製造を手掛けるグローバル企業です。

パフォーマンスを大切にする企業文化も魅力。

• 月給＋年2回の賞与
• 残業代全額支給（1分単位で計算）
• 通勤費全額支給
• 家族手当・住宅手当（対象者）

• 年間休日126日
• 有給休暇23日
• 長期休暇あり
• フレックスタイム制度あり

• 確定拠出年金
• 選択型カフェテリアプランなど

• NVM、メモリ回路設計、半導体IP、先端ファウンドリ技術に携われる
• グローバルな開発環境
• 競争力のある報酬制度
• パフォーマンスを大切にする企業文化
• フレックスタイムや休暇など、ワークライフバランスを取りやすい
• 福利厚生も充実

転職のご相談もお気軽にどうぞ。

• Over 3 years of relevant engineering experience, with practical experience in Non-Volatile Memory (NVM) development and memory circuit design.
• Hands-on experience with transistor-level circuit design, simulation and semiconductor layout processes.
• Practical experience using semiconductor design and simulation tools such as Cadence Virtuoso and Synopsys HSPICE.
• Understanding of memory circuit architecture, design verification and semiconductor development processes.
• Technical College (Kosen) qualification or higher; a Bachelor's or Master's degree in Engineering, Science or a related technical discipline is preferred.

• Action-oriented approach with strong ownership and the ability to deliver engineering tasks reliably according to project schedules.
• Strong communication and interpersonal skills for effective collaboration with process engineers, test teams and external IP vendors.
• Proactive and intellectually curious mindset with an interest in learning advanced semiconductor technologies and innovative memory architectures.
• Strong problem-solving capabilities and attention to technical detail.

• Japanese: Fluent
• English: Fluent
• Ability to work effectively in an international engineering environment and communicate technical information with internal and external stakeholders.

• Experience in analog circuit design.
• Experience in digital logic circuit design.
• Business-level English skills for reading technical documentation, preparing reports and participating in global engineering meetings.
• Bachelor's or Master's degree in Engineering, Science or another relevant technical field.

Our client is a major semiconductor manufacturing company specialising in advanced foundry technologies and logic semiconductor fabrication.

Supported by an international semiconductor organisation, the company combines global technical expertise with a stable, performance-driven working environment. Its engineering teams contribute to sophisticated semiconductor technologies requiring advanced circuit design, manufacturing and IP development capabilities.

This is an opportunity to develop specialist expertise within the Japanese semiconductor industry while contributing to advanced Non-Volatile Memory technologies and next-generation semiconductor applications.

• Competitive compensation: Benefit from competitive monthly compensation, generous twice-yearly bonuses and fully paid overtime calculated in one-minute increments.
• Work-life balance: Enjoy 126 annual holidays, flexible working hours and extended seasonal breaks.
• Generous paid leave: Receive up to 23 days of paid leave to support a sustainable working lifestyle.
• Comprehensive benefits: Access defined contribution pension programmes and a flexible cafeteria benefits plan.
• Additional allowances: Benefit from full commuting cost coverage as well as applicable family and housing allowances.
• Advanced semiconductor technology: Build specialist expertise in NVM, memory circuit design, semiconductor IP and advanced foundry technologies.
• International engineering environment: Collaborate with technical specialists across process engineering, testing and external IP development.
• Technical career development: Expand your expertise in transistor-level design, simulation, verification and next-generation memory architectures.